Microchip PIC18F45K20 PIC4xK20
Tools used: gpasm , gpsim, gplink, sdcc
OS : Debian Linux
The Microchip company and Arrow Electronics kindly provided some samples of the PIC45K20 chip for evaluation as a replacement for the PIC16F871currently being used.
The PIC18F45K20 is available in an identical 44 pin TQFP package to
PIC16F871 and has the same general
pin functions , including the programming pins. It dropped in an existing board and ran without needing any hardware changes. It has a sibling with expanded memory, the PIC18F46K20 , which I intend to test shortly.
Compatibility with PIC16Fxxx Series
for the 45K20 shows it to be more complex than the 16F
series. It is also significantly faster
(especially at 3.3 volt Vdd), as well as being better priced.
The hardware 8 x 8 multiply saves memory space and makes
fast processing of digitized analog data much easier, as does the
inclusion of add and shift instructions capable of using the carry bit.
made possible by an extra stack relative addressing mode. I tried
recompiling a number of
quite complex PIC16F84/PIC16F871 assembler programmes, all of which
seem to run
after making minor and obvious changes.
The 45k20 has an extra interrupt vector , allowing some
prioritization. The default operation is similar to the PIC16Fxxx
series, avoiding compatibility problems. The interrupt latency , as in
the 16F series , does not vary depending on the instruction being
executed at time of interrupt, a very useful feature in the PIC family
when timing events.
Digital I/O is similar, but the configuration process is somewhat
different. Some items which were configured are now controlled by
registers (e.g. weak pull ups) , and many more configuration options
The data sheet shows the A/D converter has been sped up, but I have'nt tested this yet.
The 45K20 has much more extensive clocking options,
but will work in the same way as the PIC16F871
It has a calibrated internal oscillator , with the option of a second external oscillator (e.g. watch crystal) for timer ,calibration and lower power use.
The power consumption (current used ) of the PIC18F45k20 should be lower in every case than the PIC16F871, and using the extra timer and oscillator features a very large power saving can be achieved. Some of the clocking options are controlled by programmed flash memory, and others by RAM registers.
Watchdog and System Reliability,
Warning about Lockup State
The 16 bit instruction and data format simplifies table storage . The downside to this is seems to be that no means (e.g configuration bits) of disabling accidental execution of code in data tables is provided. The only 100% watertight way seems to be to ensure no code containing accidental loops with a clear watchdog "CLRWDT" instruction or equivalent occurs in data areas. One of the big assets of the PIC16F series is the watchdog system is completely immune to soft errors. Microchip has not , unfortunately , included execution inhibit/reset configuration bits for areas of flash memory intended for data storage. The suggestion is made in the programming manual to make the high order nibble of each data word (byte pair) x0F , which is then treated as a "nop" . I haven't been able to exhaustively test this aspect of 18F45K20 yet.
The devices exhibited a lockup state, which could not be exited by
means of the watchdog
reset, the MCLR pin or even the high voltage programming mode.
Reducing the supply below the set brownout level does not exit
way of exiting this state was to remove all bias from the device. The
entered by putting high frequency noise on the Vcc supply, or by
rapidly turning the device on. It also seemed possible to enter the
state by reducing and varying
Vcc. Since the device then showed absolutely no activity, and drew
current, it was hard to guess what the condition might be, but it
seems that neither an internal watchdog- nor brownout- nor
MCLR-reset force the chip to reconfigure and exit the lockup
It would seem very prudent to make sure the supply is well filtered
with slew rate limiting,
and that supply switches have some sort of filters or regulators,
especially if battery supplies are used.
An external watchdog that resets the chip by momentarily shutting
down the supply may prove necessary where functional integrity in
case of RFI/EMI and other soft errors is needed. There are no
references to this problem in chip data or errata lists, but hopefully
eventually be noticed and addressed by Microchip, removing the
need for such messy extra paraphernalia.
The permissible supply voltage range is lower and some of the specifications are a bit curious (probably since the specification is preliminary). The permitted frequency versus supply graph shows a a sudden step down from 64 MHz down to 20 MHz when the voltage is reduced even slightly below 3.0 volt, rather than the expected smooth decline. Table 26.5 shows typical and maximum operating currents (D0016) at 3 volts at 64 MHz - this seems to be right on the 64/20 MHz transition point.
Measuring the function of the chip with a simple program with a
delay loop using timer0 as an interrupt source and 12.5MHz crystal at
the same internal clock frequency showed the chip functioning
down to less than 1.5 volt Vdd. Enabling the on
chip PLL fourfold frequency multiplier
(internal clock of 50 MHz ) increased the lowest operating Vdd
to 2.2 volt
My test circuit used a supply bypass of 2.2 muF (ceramic SMD), which
held supply noise to an acceptable level. The package layout of the
PIC16F871 allows straightforward bypassing. The lower supply voltage
reduces noise, as do the PLL and other internal clocks when
The 2 pin ICSP interface wiring is the same as for the 16F
series if high voltage programming is used, and the
programming modes are similar. If low voltage programming is used
the extra program enable pin has been shifted (RB5 on pic18f4xk20, RB3
programming command format is completely different. Programming
the 18F series works in conjunction with the CPU core.
Instructions are loaded serially into the CPU core via the
programming pins and executed one at a time. Any instructions
(including I/O and programming instructions) seem to be
executable in this fashion. The
TABLAT register may be loaded using core instructions and then have its
into the programming host, enabling memory inspection or simple
execution and emulation.
The configuration options are much more extensive. They
are mapped into the top of main memory space.
It is important to be careful of the sequence in which the configuration bits are set , since some bits inhibit further programming of others.
This family of chips has a device ID location which allows the
programmer to automatically verify and adapt to the particular device.
Software Tools under Linux
The Programming Data Sheet indicates that the high voltage programming mode is entered using a minimum voltage of Vdd +1.7 volt (maximum of 9 volt). The sample chips required 7.2 volt Vpp at Vdd=3.3 volt rather than the 5.0 volt (3.3 + 1.7 volt) expected. I am unable to explain this discrepancy (my programmer has a current limit of 40 ma. ). This is still well within the ratings of the device, so caused no difficulties.
In all other respects programming worked exactly as expected. Some of the timing in the programming datasheet is bit obscure, but no problems were experienced.