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6870 45205 3 5 1 1 180 6 pinnumber=9 } P 7100 45200 6800 45200 1 0 0 { T 6870 45305 3 5 1 1 180 6 pinnumber=10 } B 6600 44200 200 1100 3 0 0 0 0 -1 0 -1 -1 -1 -1 -1 ] { T 6600 45450 3 5 1 1 0 0 refdes=SK6 T 6000 45000 3 5 1 1 0 0 device=10PIN } C 7000 47200 1 90 0 EMBEDDED5k6_R9_1.sym [ P 6900 47100 6900 47200 1 0 0 { T 7005 47130 3 5 0 1 90 6 pinnumber=1 } P 6900 47600 6900 47500 1 0 0 { T 6945 47630 3 5 0 1 270 6 pinnumber=2 } L 6930 47410 6870 47470 3 0 0 0 0 -1 L 6870 47350 6930 47410 3 0 0 0 0 -1 L 6930 47290 6870 47350 3 0 0 0 0 -1 L 6870 47230 6930 47290 3 0 0 0 0 -1 L 6870 47230 6900 47200 3 0 0 0 0 -1 L 6870 47470 6900 47500 3 0 0 0 0 -1 ] { T 7050 47400 3 5 1 1 0 0 refdes=R9 T 7050 47250 3 5 1 1 0 0 device=5k6 } C 5300 47300 1 90 0 EMBEDDED5k6_R10_1.sym [ P 5200 47200 5200 47300 1 0 0 { T 5305 47230 3 5 0 1 90 6 pinnumber=1 } P 5200 47700 5200 47600 1 0 0 { T 5245 47730 3 5 0 1 270 6 pinnumber=2 } L 5230 47510 5170 47570 3 0 0 0 0 -1 L 5170 47450 5230 47510 3 0 0 0 0 -1 L 5230 47390 5170 47450 3 0 0 0 0 -1 L 5170 47330 5230 47390 3 0 0 0 0 -1 L 5170 47330 5200 47300 3 0 0 0 0 -1 L 5170 47570 5200 47600 3 0 0 0 0 -1 ] { T 5350 47500 3 5 1 1 0 0 refdes=R10 T 5350 47350 3 5 1 1 0 0 device=5k6 } C 6800 46400 1 270 0 EMBEDDED330R_R13_1.sym [ P 6900 46500 6900 46400 1 0 0 { T 6920 46470 3 5 0 1 270 6 pinnumber=1 } P 6900 46000 6900 46100 1 0 0 { T 6980 45970 3 5 0 1 90 6 pinnumber=2 } L 6870 46190 6930 46130 3 0 0 0 0 -1 L 6930 46250 6870 46190 3 0 0 0 0 -1 L 6870 46310 6930 46250 3 0 0 0 0 -1 L 6930 46370 6870 46310 3 0 0 0 0 -1 L 6930 46370 6900 46400 3 0 0 0 0 -1 L 6930 46130 6900 46100 3 0 0 0 0 -1 ] { T 7050 46300 3 5 1 1 0 0 refdes=R13 T 7050 46150 3 5 1 1 0 0 device=330R } C 5300 46600 1 0 0 EMBEDDED330R_R14_1.sym [ P 5200 46700 5300 46700 1 0 0 { T 5230 46720 3 5 0 1 0 6 pinnumber=1 } P 5700 46700 5600 46700 1 0 0 { T 5730 46780 3 5 0 1 180 6 pinnumber=2 } L 5510 46670 5570 46730 3 0 0 0 0 -1 L 5450 46730 5510 46670 3 0 0 0 0 -1 L 5390 46670 5450 46730 3 0 0 0 0 -1 L 5330 46730 5390 46670 3 0 0 0 0 -1 L 5330 46730 5300 46700 3 0 0 0 0 -1 L 5570 46730 5600 46700 3 0 0 0 0 -1 ] { T 5300 46950 3 5 1 1 0 0 refdes=R14 T 5300 46800 3 5 1 1 0 0 device=330R } C 6500 48000 1 180 0 EMBEDDEDVCC__1.sym [ P 6400 48100 6400 48000 1 0 0 { T 6320 48325 3 5 0 1 270 6 pinnumber=1 T 6370 47950 3 5 0 1 270 0 pinseq=1 } T 6550 47970 3 5 0 1 0 0 net=VCC:1 L 6460 47950 6430 47980 3 0 0 0 0 -1 L 6430 47920 6460 47950 3 0 0 0 0 -1 L 6340 47950 6370 47980 3 0 0 0 0 -1 L 6370 47920 6340 47950 3 0 0 0 0 -1 L 6400 47950 6430 47950 3 0 0 0 0 -1 L 6400 47950 6370 47950 3 0 0 0 0 -1 L 6400 47960 6400 47970 3 0 0 0 0 -1 L 6400 47930 6400 47950 3 0 0 0 0 -1 L 6400 47990 6400 48000 3 0 0 0 0 -1 ] { T 654960 50000 3 5 0 1 0 0 device=VCC } C 10500 47300 1 0 0 EMBEDDEDu1_C3_1.sym [ P 10600 47500 10600 47400 1 0 0 { T 10620 47500 3 5 0 1 270 6 pinnumber=1 } P 10600 47200 10600 47300 1 0 0 { T 10680 47100 3 5 0 1 90 6 pinnumber=2 } L 10690 47370 10510 47370 3 0 0 0 0 -1 L 10600 47400 10600 47370 3 0 0 0 0 -1 L 10510 47330 10690 47330 3 0 0 0 0 -1 L 10600 47330 10600 47300 3 0 0 0 0 -1 ] { T 10750 47300 3 5 1 1 0 0 refdes=C3 T 10750 47150 3 5 1 1 0 0 device=u1 } C 10500 47000 1 0 0 EMBEDDEDGND__1.sym [ P 10600 47200 10600 47100 1 0 0 { T 10620 47200 3 5 0 1 270 6 pinnumber=1 T 10570 47050 3 5 0 1 270 0 pinseq=1 } T 10450 47030 3 5 0 1 180 0 net=GND:1 L 10550 47010 10650 47010 3 0 0 0 0 -1 L 10650 47070 10550 47070 3 0 0 0 0 -1 L 10650 47010 10550 47010 3 0 0 0 0 -1 L 10650 47010 10650 47070 3 0 0 0 0 -1 L 10550 47070 10550 47010 3 0 0 0 0 -1 L 10650 47070 10650 47010 3 0 0 0 0 -1 L 10550 47070 10600 47070 3 0 0 0 0 -1 L 10600 47070 10650 47070 3 0 0 0 0 -1 L 10600 47100 10600 47070 3 0 0 0 0 -1 ] { T 0 50000 3 5 0 1 0 0 device=GND } C 7200 48400 1 90 0 EMBEDDED8PIN_SK3_1.sym [ P 6400 48100 6400 48400 1 0 0 { T 6505 48330 3 5 1 1 90 6 pinnumber=1 } P 6500 48100 6500 48400 1 0 0 { T 6605 48330 3 5 1 1 90 6 pinnumber=2 } P 6600 48100 6600 48400 1 0 0 { T 6705 48330 3 5 1 1 90 6 pinnumber=3 } P 6700 48100 6700 48400 1 0 0 { T 6805 48330 3 5 1 1 90 6 pinnumber=4 } P 6800 48100 6800 48400 1 0 0 { T 6905 48330 3 5 1 1 90 6 pinnumber=5 } P 6900 48100 6900 48400 1 0 0 { T 7005 48330 3 5 1 1 90 6 pinnumber=6 } P 7000 48100 7000 48400 1 0 0 { T 7105 48330 3 5 1 1 90 6 pinnumber=7 } P 7100 48100 7100 48400 1 0 0 { T 7205 48330 3 5 1 1 90 6 pinnumber=8 } B 6300 48400 900 200 3 0 0 0 0 -1 0 -1 -1 -1 -1 -1 ] { T 6300 48750 3 5 1 1 0 0 refdes=SK3 T 6300 48600 3 5 1 1 0 0 device=8PIN } C 3400 40100 1 180 1 EMBEDDED74LS02_IC1_1.sym [ A 3730 39900 30 0 -356 3 1 0 0 0 0 P 4000 39900 3760 39900 1 0 0 { T 3830 39945 3 5 1 1 0 0 pinnumber=1 } P 3100 39800 3400 39800 1 0 0 { T 3330 39905 3 5 1 1 180 0 pinnumber=2 } P 3100 40000 3400 40000 1 0 0 { T 3330 40105 3 5 1 1 180 0 pinnumber=3 } T 3430 40050 3 5 0 1 270 2 net=GND:7 T 3370 39750 3 5 0 1 90 2 net=VCC:14 L 3400 40050 3400 39750 3 0 0 0 0 -1 L 3660 39800 3400 39800 3 0 0 0 0 -1 L 3400 40000 3660 40000 3 0 0 0 0 -1 L 3400 39800 3650 39800 3 0 0 0 0 -1 L 3400 39800 3400 40000 3 0 0 0 0 -1 L 3400 40050 3580 40050 3 0 0 0 0 -1 L 3400 39750 3580 39750 3 0 0 0 0 -1 L 3690 39960 3630 40030 3 0 0 0 0 -1 L 3610 39760 3680 39820 3 0 0 0 0 -1 L 3680 39980 3700 39910 3 0 0 0 0 -1 L 3640 40020 3570 40050 3 0 0 0 0 -1 L 3670 39810 3700 39880 3 0 0 0 0 -1 L 3630 39770 3560 39750 3 0 0 0 0 -1 L 3700 39930 3700 39870 3 0 0 0 0 -1 L 3400 40000 3400 40050 3 0 0 0 0 -1 L 3400 39750 3400 39800 3 0 0 0 0 -1 L 3610 40040 3650 40010 3 0 0 0 0 -1 L 3690 39840 3660 39800 3 0 0 0 0 -1 L 3660 40000 3690 39960 3 0 0 0 0 -1 L 3640 40020 3600 40040 3 0 0 0 0 -1 L 3690 39960 3660 40000 3 0 0 0 0 -1 L 3670 39810 3690 39850 3 0 0 0 0 -1 L 3610 39760 3650 39790 3 0 0 0 0 -1 L 3590 40040 3610 40040 3 0 0 0 0 -1 L 3690 39860 3690 39840 3 0 0 0 0 -1 L 3690 39940 3690 39960 3 0 0 0 0 -1 L 3590 39760 3610 39760 3 0 0 0 0 -1 ] { T 3400 40250 3 5 1 1 0 0 refdes=IC1 T 3400 40100 3 5 1 1 0 0 device=74LS02 } C 2500 40400 1 0 0 EMBEDDED74LS02_IC1_2.sym [ A 2830 40600 30 0 356 3 1 0 0 0 0 P 3100 40600 2860 40600 1 0 0 { T 2930 40680 3 5 1 1 180 6 pinnumber=4 } P 2200 40700 2500 40700 1 0 0 { T 2430 40720 3 5 1 1 0 6 pinnumber=5 } P 2200 40500 2500 40500 1 0 0 { T 2430 40520 3 5 1 1 0 6 pinnumber=6 } L 2500 40450 2500 40750 3 0 0 0 0 -1 L 2760 40700 2500 40700 3 0 0 0 0 -1 L 2500 40500 2760 40500 3 0 0 0 0 -1 L 2500 40700 2750 40700 3 0 0 0 0 -1 L 2500 40700 2500 40500 3 0 0 0 0 -1 L 2500 40450 2680 40450 3 0 0 0 0 -1 L 2500 40750 2680 40750 3 0 0 0 0 -1 L 2790 40540 2730 40470 3 0 0 0 0 -1 L 2710 40740 2780 40680 3 0 0 0 0 -1 L 2780 40520 2800 40590 3 0 0 0 0 -1 L 2740 40480 2670 40450 3 0 0 0 0 -1 L 2770 40690 2800 40620 3 0 0 0 0 -1 L 2730 40730 2660 40750 3 0 0 0 0 -1 L 2800 40570 2800 40630 3 0 0 0 0 -1 L 2500 40500 2500 40450 3 0 0 0 0 -1 L 2500 40750 2500 40700 3 0 0 0 0 -1 L 2710 40460 2750 40490 3 0 0 0 0 -1 L 2790 40660 2760 40700 3 0 0 0 0 -1 L 2760 40500 2790 40540 3 0 0 0 0 -1 L 2740 40480 2700 40460 3 0 0 0 0 -1 L 2790 40540 2760 40500 3 0 0 0 0 -1 L 2770 40690 2790 40650 3 0 0 0 0 -1 L 2710 40740 2750 40710 3 0 0 0 0 -1 L 2690 40460 2710 40460 3 0 0 0 0 -1 L 2790 40640 2790 40660 3 0 0 0 0 -1 L 2790 40560 2790 40540 3 0 0 0 0 -1 L 2690 40740 2710 40740 3 0 0 0 0 -1 ] { T 2500 40950 3 5 1 1 0 0 refdes=IC1 T 2500 40800 3 5 1 1 0 0 device=74LS02 } C 700 40800 1 0 0 EMBEDDED74LS02_IC1_3.sym [ P 400 41100 700 41100 1 0 0 { T 630 41120 3 5 1 1 0 6 pinnumber=8 } P 400 40900 700 40900 1 0 0 { T 630 40920 3 5 1 1 0 6 pinnumber=9 } A 1030 41000 30 0 356 3 1 0 0 0 0 P 1300 41000 1060 41000 1 0 0 { T 1130 41080 3 5 1 1 180 6 pinnumber=10 } L 700 40850 700 41150 3 0 0 0 0 -1 L 960 41100 700 41100 3 0 0 0 0 -1 L 700 40900 960 40900 3 0 0 0 0 -1 L 700 41100 950 41100 3 0 0 0 0 -1 L 700 41100 700 40900 3 0 0 0 0 -1 L 700 40850 880 40850 3 0 0 0 0 -1 L 700 41150 880 41150 3 0 0 0 0 -1 L 990 40940 930 40870 3 0 0 0 0 -1 L 910 41140 980 41080 3 0 0 0 0 -1 L 980 40920 1000 40990 3 0 0 0 0 -1 L 940 40880 870 40850 3 0 0 0 0 -1 L 970 41090 1000 41020 3 0 0 0 0 -1 L 930 41130 860 41150 3 0 0 0 0 -1 L 1000 40970 1000 41030 3 0 0 0 0 -1 L 700 40900 700 40850 3 0 0 0 0 -1 L 700 41150 700 41100 3 0 0 0 0 -1 L 910 40860 950 40890 3 0 0 0 0 -1 L 990 41060 960 41100 3 0 0 0 0 -1 L 960 40900 990 40940 3 0 0 0 0 -1 L 940 40880 900 40860 3 0 0 0 0 -1 L 990 40940 960 40900 3 0 0 0 0 -1 L 970 41090 990 41050 3 0 0 0 0 -1 L 910 41140 950 41110 3 0 0 0 0 -1 L 890 40860 910 40860 3 0 0 0 0 -1 L 990 41040 990 41060 3 0 0 0 0 -1 L 990 40960 990 40940 3 0 0 0 0 -1 L 890 41140 910 41140 3 0 0 0 0 -1 ] { T 700 41350 3 5 1 1 0 0 refdes=IC1 T 700 41200 3 5 1 1 0 0 device=74LS02 } C 2500 39600 1 0 0 EMBEDDED74LS02_IC1_4.sym [ P 2200 39900 2500 39900 1 0 0 { T 2430 39920 3 5 1 1 0 6 pinnumber=11 } P 2200 39700 2500 39700 1 0 0 { T 2430 39720 3 5 1 1 0 6 pinnumber=12 } A 2830 39800 30 0 356 3 1 0 0 0 0 P 3100 39800 2860 39800 1 0 0 { T 2930 39880 3 5 1 1 180 6 pinnumber=13 } L 2500 39650 2500 39950 3 0 0 0 0 -1 L 2760 39900 2500 39900 3 0 0 0 0 -1 L 2500 39700 2760 39700 3 0 0 0 0 -1 L 2500 39900 2750 39900 3 0 0 0 0 -1 L 2500 39900 2500 39700 3 0 0 0 0 -1 L 2500 39650 2680 39650 3 0 0 0 0 -1 L 2500 39950 2680 39950 3 0 0 0 0 -1 L 2790 39740 2730 39670 3 0 0 0 0 -1 L 2710 39940 2780 39880 3 0 0 0 0 -1 L 2780 39720 2800 39790 3 0 0 0 0 -1 L 2740 39680 2670 39650 3 0 0 0 0 -1 L 2770 39890 2800 39820 3 0 0 0 0 -1 L 2730 39930 2660 39950 3 0 0 0 0 -1 L 2800 39770 2800 39830 3 0 0 0 0 -1 L 2500 39700 2500 39650 3 0 0 0 0 -1 L 2500 39950 2500 39900 3 0 0 0 0 -1 L 2710 39660 2750 39690 3 0 0 0 0 -1 L 2790 39860 2760 39900 3 0 0 0 0 -1 L 2760 39700 2790 39740 3 0 0 0 0 -1 L 2740 39680 2700 39660 3 0 0 0 0 -1 L 2790 39740 2760 39700 3 0 0 0 0 -1 L 2770 39890 2790 39850 3 0 0 0 0 -1 L 2710 39940 2750 39910 3 0 0 0 0 -1 L 2690 39660 2710 39660 3 0 0 0 0 -1 L 2790 39840 2790 39860 3 0 0 0 0 -1 L 2790 39760 2790 39740 3 0 0 0 0 -1 L 2690 39940 2710 39940 3 0 0 0 0 -1 ] { T 2500 40150 3 5 1 1 0 0 refdes=IC1 T 2500 40000 3 5 1 1 0 0 device=74LS02 } C 2100 40300 1 0 0 EMBEDDEDGND__1.sym [ P 2200 40500 2200 40400 1 0 0 { T 2220 40500 3 5 0 1 270 6 pinnumber=1 T 2170 40350 3 5 0 1 270 0 pinseq=1 } T 2050 40330 3 5 0 1 180 0 net=GND:1 L 2150 40310 2250 40310 3 0 0 0 0 -1 L 2250 40370 2150 40370 3 0 0 0 0 -1 L 2250 40310 2150 40310 3 0 0 0 0 -1 L 2250 40310 2250 40370 3 0 0 0 0 -1 L 2150 40370 2150 40310 3 0 0 0 0 -1 L 2250 40370 2250 40310 3 0 0 0 0 -1 L 2150 40370 2200 40370 3 0 0 0 0 -1 L 2200 40370 2250 40370 3 0 0 0 0 -1 L 2200 40400 2200 40370 3 0 0 0 0 -1 ] { T 0 50000 3 5 0 1 0 0 device=GND } C 2100 39500 1 0 0 EMBEDDEDGND__1.sym [ P 2200 39700 2200 39600 1 0 0 { T 2220 39700 3 5 0 1 270 6 pinnumber=1 T 2170 39550 3 5 0 1 270 0 pinseq=1 } T 2050 39530 3 5 0 1 180 0 net=GND:1 L 2150 39510 2250 39510 3 0 0 0 0 -1 L 2250 39570 2150 39570 3 0 0 0 0 -1 L 2250 39510 2150 39510 3 0 0 0 0 -1 L 2250 39510 2250 39570 3 0 0 0 0 -1 L 2150 39570 2150 39510 3 0 0 0 0 -1 L 2250 39570 2250 39510 3 0 0 0 0 -1 L 2150 39570 2200 39570 3 0 0 0 0 -1 L 2200 39570 2250 39570 3 0 0 0 0 -1 L 2200 39600 2200 39570 3 0 0 0 0 -1 ] { T 0 50000 3 5 0 1 0 0 device=GND } C 4200 47300 1 90 0 EMBEDDED5k6_R12_1.sym [ P 4100 47200 4100 47300 1 0 0 { T 4205 47230 3 5 0 1 90 6 pinnumber=1 } P 4100 47700 4100 47600 1 0 0 { T 4145 47730 3 5 0 1 270 6 pinnumber=2 } L 4130 47510 4070 47570 3 0 0 0 0 -1 L 4070 47450 4130 47510 3 0 0 0 0 -1 L 4130 47390 4070 47450 3 0 0 0 0 -1 L 4070 47330 4130 47390 3 0 0 0 0 -1 L 4070 47330 4100 47300 3 0 0 0 0 -1 L 4070 47570 4100 47600 3 0 0 0 0 -1 ] { T 4250 47500 3 5 1 1 0 0 refdes=R12 T 4250 47350 3 5 1 1 0 0 device=5k6 } C 9600 42100 1 90 0 EMBEDDEDGND__1.sym [ P 9400 42200 9500 42200 1 0 0 { T 9525 42220 3 5 0 1 0 6 pinnumber=1 T 9550 42170 3 5 0 1 0 0 pinseq=1 } T 9570 42050 3 5 0 1 270 0 net=GND:1 L 9590 42150 9590 42250 3 0 0 0 0 -1 L 9530 42250 9530 42150 3 0 0 0 0 -1 L 9590 42250 9590 42150 3 0 0 0 0 -1 L 9590 42250 9530 42250 3 0 0 0 0 -1 L 9530 42150 9590 42150 3 0 0 0 0 -1 L 9530 42250 9590 42250 3 0 0 0 0 -1 L 9530 42150 9530 42200 3 0 0 0 0 -1 L 9530 42200 9530 42250 3 0 0 0 0 -1 L 9500 42200 9530 42200 3 0 0 0 0 -1 ] { T 0 49900 3 5 0 1 0 0 device=GND } C 12700 47500 1 90 0 EMBEDDED12k_R3_1.sym [ P 12600 47400 12600 47500 1 0 0 { T 12705 47430 3 5 0 1 90 6 pinnumber=1 } P 12600 47900 12600 47800 1 0 0 { T 12645 47930 3 5 0 1 270 6 pinnumber=2 } P 12800 47600 12700 47600 1 0 0 { T 13025 47680 3 5 0 1 180 6 pinnumber=3 } L 12630 47590 12570 47650 3 0 0 0 0 -1 L 12570 47530 12630 47600 3 0 0 0 0 -1 L 12630 47710 12570 47770 3 0 0 0 0 -1 L 12570 47650 12630 47710 3 0 0 0 0 -1 L 12660 47600 12660 47560 3 0 0 0 0 -1 L 12660 47600 12700 47600 3 0 0 0 0 -1 L 12570 47530 12600 47500 3 0 0 0 0 -1 L 12640 47600 12650 47620 3 0 0 0 0 -1 L 12570 47770 12600 47800 3 0 0 0 0 -1 L 12650 47580 12640 47590 3 0 0 0 0 -1 L 12660 47610 12670 47600 3 0 0 0 0 -1 L 12660 47620 12660 47640 3 0 0 0 0 -1 ] { T 12750 47950 3 5 1 1 0 0 refdes=R3 T 12750 47800 3 5 1 1 0 0 device=12k } T 7600 48530 3 5 1 1 0 0 Power from 15 Volt T 7600 48430 3 5 1 1 0 0 AC or DC Plugpack T 6300 43730 3 5 1 1 0 0 Pin 3 corresponds to RB3 for LV T 6300 43630 3 5 1 1 0 0 Programming if used.Pin is pulled T 6300 43530 3 5 1 1 0 0 down by 100k on target board. T 6300 43430 3 5 1 1 0 0 PICPWRO is power to target board T 6300 43330 3 5 1 1 0 0 PICPWRI is power from target board. T 6300 43230 3 5 1 1 0 0 Target board may be either self T 6300 43130 3 5 1 1 0 0 powered or supplied from PICPWRO T 6300 43030 3 5 1 1 0 0 T 4400 49230 3 5 1 1 0 0 Jumper Block T 4400 49130 3 5 1 1 0 0 pull up config T 4400 49030 3 5 1 1 0 0 ........ T 4400 48930 3 5 1 1 0 0 ><.><... lcl vcc T 4400 48830 3 5 1 1 0 0 .><><... rem vcc T 4400 48730 3 5 1 1 0 0 xxxxxx>< lcl pwr T 4400 48630 3 5 1 1 0 0 T 4400 48530 3 5 1 1 0 0 T 12100 47030 3 5 1 1 0 0 Vcc Adjust T 12100 46930 3 5 1 1 0 0